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https://openthread.io/guides/border-router
https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/nrf/installation.html
https://github.com/makerdiary/ncs-playground
  Nordic RF5 Nordic Semiconductor
  Nordic RF5 Nordic Semiconductor
  TI Texas Instruments
  TI Texas Instruments
Line 9: Line 14:
  ARM      Cortex A / M
  ARM      Cortex A / M
  MIPS      RISC-V
  MIPS      RISC-V
mips_24kc ath79


  Freescale:      : Intel > NXP
  Freescale:      : Intel > NXP
Line 19: Line 22:
  ESP32 Tensilica Xtensa LX6
  ESP32 Tensilica Xtensa LX6


mips_24kc ath79HUE uses QCA9533 ver 2 rev 0, which is an ATH79 processor, which is a MIPS 24kc build by Atheros, bought by Qualcomm


HUE uses QCA9533 ver 2 rev 0, which is an ATH79 processor, which is a MIPS 24kc build by Atheros, bought by Qualcomm
NXP i.MX8 Nano, is an ARM A7 processor, built by Freescale, bought by NXP
NXP i.MX8 Nano, is an ARM A7 processor, built by Freescale, bought by NXP
  ATSAMR21E18A
  ATSAMR21E18A
Line 42: Line 45:




===
=IOT devices and tooling=
Arduino
Arduino
Espressif SDK
Espressif SDK
Platform.IO
Platform.IO


=== Linux
DTD Tree
BSP BoardSupport Package
CPU Support
Yocto


Linux needs depends on Memory Mapper


STM32 MCUBoot
STM32 MCUBoot
NRF91 SBSU Boot
NRF91 SBSU Boot


<nowiki>=== RTOS ===</nowiki>


=== RTOS
FreeRTOS
FreeRTOS
Mynewt
Mynewt
Zephyr
Zephyr




=== IEEE 802
 
<nowiki>=== IEEE 802 ===</nowiki>
 
https://ieeexplore.ieee.org/browse/standards/get-program/page/series?id=68
https://ieeexplore.ieee.org/browse/standards/get-program/page/series?id=68


Line 86: Line 90:


=== IEEE 802.15.4
=== IEEE 802.15.4
ISM Band, Wifi overlapping channels, Bluetooth 80x1Mhz, BLE 40x2Mhz
 
ISM Band, Wifi overlapping channels,
 
Bluetooth 80x1Mhz
 
BLE 40x2Mhz


  Bluetooth Classic
  Bluetooth Classic
Line 94: Line 103:
  ZWave (not 2.4ghz)
  ZWave (not 2.4ghz)


<nowiki>=== Zigbee ===</nowiki>


=== Zigbee
https://zigbeealliance.org/wp-content/uploads/2019/11/docs-05-3474-21-0csg-zigbee-specification.pdf
https://zigbeealliance.org/wp-content/uploads/2019/11/docs-05-3474-21-0csg-zigbee-specification.pdf
Commisioning
Commisioning
LightTouch
LightTouch


=== Thread
<nowiki>=== Thread ===</nowiki>
 
CSA Zigbee
CSA Zigbee
Controller, End-Device
Controller, End-Device


Line 167: Line 180:
=== IOT ===
=== IOT ===
MQTT
MQTT
CoAP
CoAP
OMA LWM2M
OMA LWM2M


=== PlatformIO ===
=== PlatformIO ===
RTL8196E
RTL8196E
GD25Q127
GD25Q127


Line 191: Line 206:
  python.exe .\esptool.py --port com3 --baud 460800 --no-stub read_flash --spi-connection HSPI 0 0x2000 boot.bin
  python.exe .\esptool.py --port com3 --baud 460800 --no-stub read_flash --spi-connection HSPI 0 0x2000 boot.bin
  --flash_mode qio
  --flash_mode qio


  python.exe .\esptool.py --port com3 --baud 460800 --before default_reset --after hard_reset erase_flash --spi-connection SPI
  python.exe .\esptool.py --port com3 --baud 460800 --before default_reset --after hard_reset erase_flash --spi-connection SPI
  python.exe .\esptool.py --port com3 --baud 460800 --before default_reset --after hard_reset write_flash --spi-connection SPI 0x0 flash_16m.bin
  python.exe .\esptool.py --port com3 --baud 460800 --before default_reset --after hard_reset write_flash --spi-connection SPI 0x0 flash_16m.bin




Line 200: Line 215:


Values are SPI, HSPI, or a sequence of 5 pin numbers CLK,Q,D,HD,CS)
Values are SPI, HSPI, or a sequence of 5 pin numbers CLK,Q,D,HD,CS)
SPI0 and SPI1 are the first SPI bus with two chips connected to Flash and RAM
SPI0 and SPI1 are the first SPI bus with two chips connected to Flash and RAM
SPI is the V-SPI?
SPI is the V-SPI?
HSPI is the HSPI?
HSPI is the HSPI?



Latest revision as of 08:08, 30 March 2024

https://openthread.io/guides/border-router

https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/nrf/installation.html

https://github.com/makerdiary/ncs-playground

Nordic RF5 Nordic Semiconductor
TI Texas Instruments
Silabs Silicon Labs
Microchip Atmel
NXP Freescale
ISA
Intel/AMD X86-64
ARM       Cortex A / M
MIPS      RISC-V
Freescale:      : Intel > NXP
Broadcom
Atheros  : Qualcomm
Atmel    : 328P : > Microchip
Texas Instruments CC26xx
ESP32 Tensilica Xtensa LX6

mips_24kc ath79HUE uses QCA9533 ver 2 rev 0, which is an ATH79 processor, which is a MIPS 24kc build by Atheros, bought by Qualcomm

NXP i.MX8 Nano, is an ARM A7 processor, built by Freescale, bought by NXP

ATSAMR21E18A

https://erik-engheim.medium.com/interesting-random-facts-about-arm-x86-risc-v-and-mips-7e670b249222

https://www.mips.com/products/architectures/mips32-2/

https://www.intel.com/content/www/us/en/developer/articles/technical/intel-sdm.html

Micro Processor / Controller (sliding scale)
ARM Cortex A7
NXP i.MX8
RISC-V
TI
ARM Cortex M4
STM32

Radio 2.4Ghz Espressif ESP32, S-C-H


IOT devices and tooling

Arduino

Espressif SDK

Platform.IO


STM32 MCUBoot

NRF91 SBSU Boot

=== RTOS ===

FreeRTOS

Mynewt

Zephyr


=== IEEE 802 ===

https://ieeexplore.ieee.org/browse/standards/get-program/page/series?id=68

IEEE 802(R): Overview and Architecture
IEEE 802.1: Bridging and Management
IEEE 802.3: Ethernet
IEEE 802.11: Wireless LANs
IEEE 802.15: Wireless PANs
IEEE 802.16: Broadband Wireless MANs
IEEE 802.19: TV White Space Coexistence Methods
IEEE 802.21: Media Independent Handover Services
IEEE 802.22: Wireless Regional Area Networks
802.1X
802.1AR
802.3    Ethernet
802.11   WIFI
802.15.4


=== IEEE 802.15.4

ISM Band, Wifi overlapping channels,

Bluetooth 80x1Mhz

BLE 40x2Mhz

Bluetooth Classic
Bluetooth BLE
Bluetooth Mesh
Zigbee
ZWave (not 2.4ghz)

=== Zigbee ===

https://zigbeealliance.org/wp-content/uploads/2019/11/docs-05-3474-21-0csg-zigbee-specification.pdf

Commisioning

LightTouch

=== Thread ===

CSA Zigbee

Controller, End-Device

https://openthread.io/guides/border-router

https://www.threadgroup.org/ThreadSpec

https://openthread.io/guides/thread-primer

docker pull openthread/environment:latest
docker run --name codelab_otsim_ctnr -it --rm \
  --sysctl net.ipv6.conf.all.disable_ipv6=0 \
  --cap-add=net_admin openthread/environment bash
/openthread/build/examples/apps/cli/ot-cli-ftd 1
dataset init new
dataset
dataset commit active
ifconfig up
thread start
state
ipaddr
docker exec -it codelab_otsim_ctnr bash
/openthread/build/examples/apps/cli/ot-cli-ftd 2
dataset networkkey e4344ca17d1dca2a33f064992f31f786
dataset panid 0xc169
dataset commit active
thread start
state
rloc16
router table
thread stop
factoryreset

// on 1

commissioner start
commissioner joiner add * J01NME

// on 2

joiner start J01NME
state
mkdir -p /dev/net
mknod /dev/net/tun c 10 200
chmod 600 /dev/net/tun
/openthread/build/posix/src/posix/ot-daemon -v 'spinel+hdlc+forkpty:///openthread/build/examples/apps/ncp/ot-rcp?forkpty-arg=2'
eui64
commissioner start
commissioner joiner add 18b4300000000001 J01NME
ifconfig up
joiner start J01NME
thread start
state
ping6 -c 4 fd55:cf34:dea5:7994:460:872c:e807:c4ab

Matter

https://github.com/project-chip/connectedhomeip

IOT

MQTT

CoAP

OMA LWM2M

PlatformIO

RTL8196E

GD25Q127

cd C:\Users\me\.platformio\packages\framework-espidf\components\esptool_py\esptool
python.exe .\esptool.py
ESP32-D0WDQ6 (revision 1)
4c:11:ae:74:63:b0
python.exe .\esptool.py --port com3 --baud 115200 version 
python.exe .\esptool.py --port com3 --baud 115200 chip_id
python.exe .\esptool.py --port com3 --baud 115200 flash_id --spi-connection HSPI
python.exe .\esptool.py --port com3 --baud 115200 read_flash_status --spi-connection HSPI
python.exe .\esptool.py --port com3 --baud 115200 read_flash --spi-connection HSPI 0 0x400000 flash_dump.bin
python.exe .\esptool.py --port com3 --baud 460800 read_flash --spi-connection SPI 0 0x1600000 flash_16m.bin
python.exe .\esptool.py --port com3 --baud 460800 --no-stub read_flash --spi-connection HSPI 0 16777216 new_16m.bin
python.exe .\esptool.py --port com3 --baud 460800 --no-stub read_flash --spi-connection HSPI 0 0x2000 boot.bin
--flash_mode qio
python.exe .\esptool.py --port com3 --baud 460800 --before default_reset --after hard_reset erase_flash --spi-connection SPI
python.exe .\esptool.py --port com3 --baud 460800 --before default_reset --after hard_reset write_flash --spi-connection SPI 0x0 flash_16m.bin


(choose from 'load_ram', 'dump_mem', 'read_mem', 'write_mem', 'write_flash', 'run', 'image_info', 'make_image', 'elf2image', 'read_mac', 'chip_id', 'flash_id', 'read_flash_status', 'write_flash_status', 'read_flash', 'verify_flash', 'erase_flash', 'erase_region', 'merge_bin', 'get_security_info', 'version')

Values are SPI, HSPI, or a sequence of 5 pin numbers CLK,Q,D,HD,CS)

SPI0 and SPI1 are the first SPI bus with two chips connected to Flash and RAM

SPI is the V-SPI?

HSPI is the HSPI?


https://alu.dog/posts/livarno-lux/

https://zigbee.blakadder.com/Lidl_TYGWZ-01.html

https://github.com/banksy-git/lidl-gateway-freedom/tree/master/scripts